1. Field of the Invention
The present invention relates to a calibration technology for a pipeline ADC, particularly to an FFT-based ADC calibration system.
2. Description of the Related Art
Recently, many communication systems need ADC (Analog-to-Digital Converter) to bridge the analog signal and DSP (Digital Signal Processor), especially the high-resolution and high-sample rate ADC facilitating the fast development of communication systems, and the pipeline ADC is a frequently used architecture among them.
The performance of the conventional ADC is affected by capacitor mismatch, finite Op-Amp (Operation Amplifier) open loop gain, and comparator offset. Therefore, calibration systems are used to achieve a high-resolution ADC, and the digital calibration system is a frequently-used one among them. The digital calibration system performs additional coding on the digital output.
The present invention uses an FFT processor to calculate the errors of all the stages of the pipeline ADC and performs coding calibration in the digital output terminal to promote ADC performance.